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Graph neural networks (GNNs) are the dominant approach to solving machine learning problems defined over graphs. Despite much theoretical and empirical work in recent years, our understanding of finer-grained aspects of architectural design for GNNs remains impoverished. In this paper, we consider the benefits of architectures that maintain and update edge embeddings. On the theoretical front, under a suitable computational abstraction for a layer in the model, as well as memory constraints on the embeddings, we show that there are natural tasks on graphical models for which architectures leveraging edge embeddings can be much shallower. Our techniques are inspired by results on time-space tradeoffs in theoretical computer science. Empirically, we show architectures that maintain edge embeddings almost always improve on their node-based counterparts—frequently significantly so in topologies that have “hub” nodes. 

Abstract Studies commonly assumed that variations in ionospheric conductance were insignificant and proposed that vorticities can be a reliable proxy or diagnostic for ionospheric field‐aligned currents (FACs). We propose a complete method for measuring FACs using data from the Super Dual Auroral Radar Network radar and the Defense Meteorological Satellite Program. In our method, the FACs are determined by three terms. The first term is referred to as magnetospheric‐origin FACs, while the second and third terms are known as ionospheric‐origin FACs. This method incorporates height‐integrated conductances based on observational data, thereby addressing the limitation of assuming uniform conductances. Different from previous works, we can calculate FACs at a low altitude of 250 km and obtain high‐resolution measurements within observable areas. Another advantage of this method lies in its ability to directly calculate and analyze the impact of ionospheric vorticity and conductance on FACs. We apply this method to obtain FACs in the Northern Hemisphere from 2010 to 2016 and analyze the distributions of height‐integrated conductances and total FACs. Our analysis reveals that the average FACs clearly exhibit the large‐scale R1 and R2 FAC systems. We conduct statistical analysis on magnetospheric‐origin FACs and ionospheric‐origin FACs. Our findings show that within the auroral oval, ionospheric‐origin FACs reach a comparable level to magnetospheric‐origin FACs. However, ionospheric‐origin FACs are significantly minor and almost negligible in other regions. This implies that height‐integrated conductance gradients and vorticities play equally significant roles within the auroral oval, whereas vorticities dominate in other regions. 

In this work, we propose a novel approach for the real-time estimation of chip-level spatial power maps for commercial Google Coral M.2 TPU chips based on a machine-learning technique for the first time. The new method can enable the development of more robust runtime power and thermal control schemes to take advantage of spatial power information such as hot spots that are otherwise not available. Different from the existing commercial multi-core processors in which real-time performance-related utilization information is available, the TPU from Google does not have such information. To mitigate this problem, we propose to use features that are related to the workloads of running different deep neural networks (DNN) such as the hyperparameters of DNN and TPU resource information generated by the TPU compiler. The new approach involves the offline acquisition of accurate spatial and temporal temperature maps captured from an external infrared thermal imaging camera under nominal working conditions of a chip. To build the dynamic power density map model, we apply generative adversarial networks (GAN) based on the workload-related features. Our study shows that the estimated total powers match the manufacturer's total power measurements extremely well. Experimental results further show that the predictions of power maps are quite accurate, with the RMSE of only 4.98\rm mW/mm^2, or 2.6\% of the full-scale error. The speed of deploying the proposed approach on an Intel Core i7-10710U is as fast as 6.9ms, which is suitable for real-time estimation.